The manufacture of CMOS integrated circuit devices involves a large number of processing steps of which probably the most critical are the various photolithographic operations used to form the masks that serve to localize the various implantation steps by which ions, used as dopants, are introduced into the semiconductor (usually silicon) substrate to define the electronic structure of the substrate and to impart the desired electronic properties to the final device. These are commonly referred to as masking steps and a continuing aim in manufacture has been to reduce the number of masking steps to simplify the process, thereby increasing the manufacturing yield and reducing the cost.
The present invention is a process for manufacturing CMOS integrated circuit devices with fewer masking steps than previously used for making comparable devices.